SN74CB3Q3384ADGVR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74CB3Q3384ADGVR
Manufacturer

TI
ChipWorker Part#

CW51086136
Category

Logic Controller, Logic IC
Package

TVSOP-24
Description

10Bit 2.5V/3.3V Low-Voltage FET Bus Switch 24-TVSOP -40℃ to 85℃
Documentation

Datasheet

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SN74CB3Q3384ADGVR Specifications

Attribute	Attribute Value

Part Number	SN74CB3Q3384ADGVR
Manufacturer	TI
ChipWorker Part#	CW51086136
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	24 Pin
Case/Package	TVSOP-24
Supply Voltage (DC)	2.30V ~ 3.60V
Output Current	30.0 mA
Contacts Type	SPST
Number of Bits	10 Bit
Propagation Delay Max (tpd)	250 ps
Voltage Nodes	2.50 V, 3.30 V
Bandwidth	500 MHz
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.3V ~ 3.6V
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Size-Length	5 mm
Size-Width	4.4 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	EAR99

Product Description

The SN74CB3Q3384A is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3384A provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.
The SN74CB3Q3384A is organized as two 5-bit bus switches with separate output-enable (1OE\, 2OE\\\\) inputs. It can be used as two 5-bit bus switches, or as one 10-bit bus switch. When OE\ is low, the associated 5-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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