SN74F74N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74F74N
Manufacturer

TI
ChipWorker Part#

CW7071703
Category

Flip Flop IC
Package

DIP-14
Description

TEXAS INSTRUMENTS SN74F74N Flip-Flop, Complementary, Positive Edge, 74F74, D, 4.9ns, 100MHz, 20mA, DIP
Documentation

Datasheet

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SN74F74N Specifications

Attribute	Attribute Value

Part Number	SN74F74N
Manufacturer	TI
ChipWorker Part#	CW7071703
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	14 Pin
Case/Package	DIP-14
Frequency	100 MHz
Supply Voltage (DC)	4.50V ~ 5.50V
Number of Outputs	1 Output
Output Current	20 mA
Number of Circuits	2 Circuit
Number of Channels	2 Channel
Number of Positions	14 Position
Clock Speed	145 MHz
Number of Bits	2 Bit
Propagation Delay Max (tpd)	9.20 ns
Polarity	Non-Inverting, Inverting
Voltage Nodes	5.00 V
Output Current Drive	-50.0 µA
Number of Inputs	1 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.5V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
Mil-Spec	Yes
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74F74N is a dual positive-edge-triggered D-type Flip-flop with clear and preset. A low level at the preset (PRE\\) or clear (CLR\\) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs. The output levels are not guaranteed to meet the minimum levels for VOH. Furthermore, this configuration is non-stable, that is, it will not persist when PRE\ or CLR\ returns to its inactive (high) level.

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