SN74HC132PWR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74HC132PWR
Manufacturer

TI
ChipWorker Part#

CW5937614
Category

Logic Control, Logic Gate IC
Package

TSSOP-14
Description

NAND Gate 4Element 2IN CMOS 14Pin TSSOP
Documentation

Datasheet

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SN74HC132PWR Specifications

Attribute	Attribute Value

Part Number	SN74HC132PWR
Manufacturer	TI
ChipWorker Part#	CW5937614
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	14 Pin
Case/Package	TSSOP-14
Supply Voltage (DC)	2.00V ~ 6.00V
Number of Outputs	1 Output
Output Current	5.2 A
Number of Circuits	4 Circuit
Number of Positions	14 Position
Number of Bits	4 Bit
Propagation Delay Max (tpd)	27.0 ns
Voltage Nodes	6.00 V, 5.00 V, 2.00 V
Number of Gates	4 Gate
Output Current Drive	-1.00 mA
Number of Inputs	2 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99

Product Description

The SN74HC132PWR is a quadruple Positive-NAND Gate with Schmitt-trigger inputs. The circuit functions as a NAND gate, but because of the Schmitt action, it has different input threshold levels for positive- and negative- going signals. The devices perform the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic. This circuit is temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
Outputs can drive up to 10 LSTTL loads
20µA Maximum ICC low power consumption
14ns Typical tpd
±4mA Output drive at 5V
1µA Maximum low input current
Operation from very slow input transitions
Temperature-compensated threshold levels
High noise immunity
Same pinouts as "HC00"
Green product and no Sb/Br

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