SN74HC574N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74HC574N
Manufacturer

TI
ChipWorker Part#

CW387230
Category

Flip Flop IC
Package

DIP-20
Description

TEXAS INSTRUMENTS SN74HC574N Flip-Flop, Tri State Non Inverted, Positive Edge, 74HC574, D, 31ns, 40MHz, 7.8mA, DIP
Documentation

Datasheet

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SN74HC574N Specifications

Attribute	Attribute Value

Part Number	SN74HC574N
Manufacturer	TI
ChipWorker Part#	CW387230
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	20 Pin
Case/Package	DIP-20
Frequency	40 MHz
Supply Voltage (DC)	2.00V ~ 6.00V
Number of Outputs	8 Output
Output Current	7.8 mA
Number of Circuits	8 Circuit
Number of Channels	8 Channel
Number of Positions	20 Position
Clock Speed	36 MHz
Number of Bits	8 Bit
Propagation Delay Max (tpd)	38.0 ns
Polarity	Non-Inverting
Voltage Nodes	6.00 V, 5.00 V, 2.00 V
Number of Gates	8 Gate
Input Capacitance	3 pF
Output Current Drive	-1.00 mA
Number of Inputs	8 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Size-Length	24.33 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74HC574N is an octal edge-triggered D-type Flip-flop with 3-state outputs. Designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load NOR drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull up components. OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
Wide operating voltage range
High-current 3-state non-inverting outputs drive bus lines directly or up to 15 LSTTL loads
Low power consumption
22ns Typical TPD
±6mA Output drive at 5V
1µA Maximum low input current
Bus-structured pin out

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