SN74HC595DR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74HC595DR
Manufacturer

TI
ChipWorker Part#

CW25344
Category

Shift Register IC
Package

SOIC-16
Description

8Bit Shift Registers With 3-State Output Registers 16-SOIC -40℃ to 85℃
Documentation

Datasheet

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SN74HC595DR Specifications

Attribute	Attribute Value

Part Number	SN74HC595DR
Manufacturer	TI
ChipWorker Part#	CW25344
Category	Shift Register IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC-16
Frequency	42 MHz
Supply Voltage (DC)	2.00V ~ 6.00V
Operating Voltage	2V ~ 6V
Number of Outputs	9 Output
Number of Circuits	4 Circuit
Number of Positions	16 Position
Number of Bits	8 Bit
Voltage Nodes	6.00 V, 5.00 V, 2.00 V
Output Current Drive	-1.00 mA
Number of Inputs	1 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Size-Length	9.9 mm
Size-Width	3.91 mm
Size-Height	1.58 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99
HK STC License	NLR

Product Description

The SN74HC595DR is a 8-bit Shift Register with 3-state output registers feeds an D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for the shift register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.
Wide operating voltage range
High-current 3-state outputs can drive up to 15 LSTTL loads
Low power consumption
13ns Typical TPD
±6mA Output drive at 5V
Green product and no Sb/Br
This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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