SN74LS139AN - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LS139AN
Manufacturer

TI
ChipWorker Part#

CW1207729
Category

Logic Controller, Logic IC
Package

PDIP-16
Description

TEXAS INSTRUMENTS SN74LS139AN Decoder / Demultiplexer, LS Family, 2:4, 4.75V to 5.25V, DIP-16
Documentation

Datasheet

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SN74LS139AN Specifications

Attribute	Attribute Value

Part Number	SN74LS139AN
Manufacturer	TI
ChipWorker Part#	CW1207729
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	PDIP-16
Supply Voltage (DC)	4.75V ~ 5.25V
Number of Outputs	4 Output
Contacts Type	DP4T
Supply Current	100 µA
Number of Circuits	2 Circuit
Number of Channels	2 Channel
Number of Positions	16 Position
Number of Bits	4 Bit
Voltage Nodes	5.00 V
Power Dissipation	200 mW
Bandwidth	35.0 MHz
Output Current Drive	-50.0 µA
Number of Inputs	2 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LS139AN is a Dual 2-line to 4-line Decoder/Demultiplexer, Schottky-clamped TTL MSI circuit, designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast-enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the Schottky-clamped system decoder is negligible. The circuit comprises two individual two-line to four-line decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications.
Designed specifically for high-speed memory decoders and data transmission systems
Two fully independent 2- to 4-line decoders/demultiplexers
Schottky-clamped for high performance

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