SN74LS161AN - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LS161AN
Manufacturer

TI
ChipWorker Part#

CW3332217
Category

Counter, Counter IC
Package

DIP-16
Description

TEXAS INSTRUMENTS SN74LS161AN Binary Synchronous Counter, LS Family, 32MHz, 4.75V to 5.25V, DIP-16
Documentation

Datasheet

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SN74LS161AN Specifications

Attribute	Attribute Value

Part Number	SN74LS161AN
Manufacturer	TI
ChipWorker Part#	CW3332217
Category	Counter, Counter IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Digital Logic Level	TTL
Supply Voltage (DC)	4.75V ~ 5.25V
Number of Outputs	4 Output
Supply Current	100 µA
Number of Circuits	4 Circuit
Number of Positions	16 Position
Clock Speed	32 MHz
Number of Bits	4 Bit
Voltage Nodes	5.00 V
Output Current Drive	-50.0 µA
Number of Inputs	4 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
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Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15

Product Description

The SN74LS161AN is a 4-bit Synchronous Binary Counter features an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally associated with asynchronous (ripple clock) counters, however counting spikes may occur on the (RCO) ripple carry output. A buffered clock input triggers the four flip-flops on the rising edge of the clock input waveform. This counter is fully programmable, that is, the outputs may be preset to either level. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the enable inputs.
Internal look-ahead for fast counting
Carry output for n-bit cascading
Synchronous counting
Synchronously programmable
Load control line
Diode-clamped inputs

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