SN74LS175N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LS175N
Manufacturer

TI
ChipWorker Part#

CW1402326
Category

Flip Flop IC
Package

DIP-16
Description

TEXAS INSTRUMENTS SN74LS175N Flip-Flop, with Clear, Complementary, Positive Edge, 74LS175, D, 13ns, 30MHz, 8mA, DIP
Documentation

Datasheet

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SN74LS175N Specifications

Attribute	Attribute Value

Part Number	SN74LS175N
Manufacturer	TI
ChipWorker Part#	CW1402326
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Frequency	30 MHz
Supply Voltage (DC)	4.75V ~ 5.25V
Number of Outputs	4 Output
Output Current	8 mA
Number of Circuits	1 Circuit
Number of Channels	4 Channel
Number of Positions	16 Position
Clock Speed	40 MHz
Number of Bits	4 Bit
Propagation Delay Max (tpd)	25.0 ns
Polarity	Non-Inverting, Inverting
Voltage Nodes	5.00 V
Output Current Drive	-50.0 µA
Number of Inputs	4 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LS175N is a quadruple D-type Flip-flop with clear utilize TTL circuitry to implement D-type flip-flop logic. The LS175 feature complementary outputs from each flip-flop. Information at the D-inputs meeting the setup time requirements is transferred to the Q-outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D-input signal has no effect at the output. This circuit is fully compatible for use with most TTL circuits.
Four flip-flops with double-rail outputs
Three performance range
Buffered clock and direct clear inputs
Individual data input to each flip-flop

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