SN74LS259BN - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LS259BN
Manufacturer

TI
ChipWorker Part#

CW23255246
Category

Latche IC
Package

PDIP-16
Description

TEXAS INSTRUMENTS SN74LS259BN Latch, LS Family, 74LS259, Addressable, Standard, 19ns, 8mA, DIP
Documentation

Datasheet

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SN74LS259BN Specifications

Attribute	Attribute Value

Part Number	SN74LS259BN
Manufacturer	TI
ChipWorker Part#	CW23255246
Category	Latche IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	PDIP-16
Digital Logic Level	TTL
Supply Voltage (DC)	4.75V ~ 5.25V
Number of Outputs	8 Output
Output Current	8 mA
Supply Current	22.0 mA
Number of Circuits	1 Circuit
Number of Channels	8 Channel
Number of Positions	16 Position
Number of Bits	8 Bit
Propagation Delay Max (tpd)	30.0 ns
Polarity	Non-Inverting
Voltage Nodes	5.00 V
Quiescent Current	19 mA
Output Current Drive	-50.0 µA
Number of Inputs	1 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Weight	0.015227096868 kg
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Contains Lead
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15

Product Description

The SN74LS259BN is an octal Addressable Latch designed for general purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers and active-high decoders or demultiplexers. It is multifunctional device capable of storing single-line data in eight addressable latches and being a 1-of-8 decoder or demultiplexer with active-high outputs. Four distinct modes of operation are selectable by controlling the clear (CLR\\) and enable (G\\) inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in terminal is written into the addressed latch. The addressed latch will follow the data input with all unaddressed latches remaining in their previous states. In the memory mode, all latches remain in their previous states and are unaffected by the data or address inputs.
Asynchronous parallel clear
Active high decoder
Enable/disable input simplified expansion
Expandable for N-bit applications
Four district functional modes
Dependable Texas Instruments quality and reliability

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