SN74LS280N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LS280N
Manufacturer

TI
ChipWorker Part#

CW8376663
Category

Logic Control, Logic Gate IC
Package

DIP-14
Description

Parity Generator/Checker 9Bit 14Pin PDIP Tube
Documentation

Datasheet

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SN74LS280N Specifications

Attribute	Attribute Value

Part Number	SN74LS280N
Manufacturer	TI
ChipWorker Part#	CW8376663
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	14 Pin
Case/Package	DIP-14
Digital Logic Level	TTL
Supply Voltage (DC)	5.00 V, 5.50 V (max)
Number of Outputs	9 Output
Output Current	8 mA
Supply Current	16.0 mA
Number of Circuits	9 Bit Circuit
Number of Channels	9 Channel
Number of Positions	14 Position
Number of Bits	9 Bit
Propagation Delay Max (tpd)	50.0 ns
Voltage Nodes	5.00 V
Power Dissipation	80 mW
Output Current Drive	-50.0 µA
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Power Dissipation (Max)	80 mW
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
	expand all
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LS280N is a 9-bit odd/even Parity Generator/Checker utilizes Schottky-clamped TTL high-performance circuitry and feature odd/even outputs to facilitate operation of either odd or even parity application. The word-length capability is easily expanded by cascading as shown under typical application data. It offers the designer a trade-OFF between reduced power consumption and high performance. It can be used to upgrade the performance of most systems utilizing the "180 parity generator/checker. Although It is implemented without expander inputs, the corresponding function is provided by the availability of an input at pin 4 and the absence of any internal connection at pin 3.
Generates either odd or even parity for nine data lines
Cascadable for n-bits
Can be used to upgrade existing systems using MSI parity circuits

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