SN74LS299N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LS299N
Manufacturer

TI
ChipWorker Part#

CW39542633
Category

Shift Register IC
Package

DIP-20
Description

TEXAS INSTRUMENTS SN74LS299N Shift Register, LS Family, Shift Store, 74LS299, Universal, 1Element, 8Bit, DIP, 20Pins
Documentation

Datasheet

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SN74LS299N Specifications

Attribute	Attribute Value

Part Number	SN74LS299N
Manufacturer	TI
ChipWorker Part#	CW39542633
Category	Shift Register IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	20 Pin
Case/Package	DIP-20
Frequency	35.0 MHz
Digital Logic Level	TTL
Supply Voltage (DC)	4.75V ~ 5.25V
Number of Outputs	10 Output
Supply Current	33.0 mA
Number of Circuits	2 Circuit
Number of Positions	20 Position
Number of Bits	8 Bit
Voltage Nodes	5.00 V
Output Current Drive	-50.0 µA
Number of Inputs	10 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
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Size-Length	24.33 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Weight	0.0191855977428 kg
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LS299N is an universal Shift/Storage Register features multiplexed inputs/outputs to achieve full eight-bit data handling in a single 20-pin package. Two function-select inputs and two output-control inputs can be used to choose the modes of operation listed in the function table. Synchronous parallel loading is accomplished by taking both function-select lines, S0 and S1, high. This places the three-state outputs in a high-impedance state, which permits data that is applied on the input/output lines to be clocked into the register. Reading out of the register can be accomplished while the outputs are enabled in any mode. A direct overriding input is provided to clear the register whether the outputs are enabled or off.
Multiplexed inputs/outputs provide improved bit density
Hold (Store) operating mode
Shift left operating mode
Shift right operating mode
Load data operating mode
Operates with outputs enabled or at high Z
3-state Outputs drive bus lines directly
Can be cascaded for N-bit word lengths

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