SN74LS590N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LS590N
Manufacturer

TI
ChipWorker Part#

CW14709266
Category

Logic Controller, Logic IC
Package

PDIP-16
Description

TEXAS INSTRUMENTS SN74LS590N Binary Counter, LS Family, 35MHz, 4.75V to 5.25V, DIP-16
Documentation

Datasheet

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SN74LS590N Specifications

Attribute	Attribute Value

Part Number	SN74LS590N
Manufacturer	TI
ChipWorker Part#	CW14709266
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	PDIP-16
Digital Logic Level	TTL
Supply Voltage (DC)	4.75V ~ 5.25V
Number of Outputs	8 Output
Supply Current	44.0 mA
Number of Circuits	1 Circuit
Number of Positions	16 Position
Clock Speed	35 MHz
Number of Bits	8 Bit
Voltage Nodes	5.00 V
Output Current Drive	-108 µA
Number of Inputs	1 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LS590N is a 8-bit Binary Counter with output registers and 3-state outputs. It feeds an 8-bit storage register. The storage register has parallel outputs. Separate clocks are provided for both the binary counter and storage register. The binary counter features a direct clear input CCLR\ and a count enable input CCKEN\\. For cascading, a ripple carry output RCO\ is provided. Expansion is easily accomplished for two stages by connecting RCO\ of the first stage to CCKEN\ of the second stage. Cascading for larger count chains can be accomplished by connecting RCO\ of each stage to CCK of the following stage. Both the counter and register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the counter state will always be one count ahead of the register. Internal circuitry prevents clocking from the clock enable.
TTL Input
CMOS Output

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