SN74LS90N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LS90N
Manufacturer

TI
ChipWorker Part#

CW597559
Category

Logic Controller, Logic IC
Package

PDIP-14
Description

Decade / Binary Counter, LS Family, 42MHz, 4.75V to 5.25V, DIP-14
Documentation

Datasheet

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SN74LS90N Specifications

Attribute	Attribute Value

Part Number	SN74LS90N
Manufacturer	TI
ChipWorker Part#	CW597559
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	14 Pin
Case/Package	PDIP-14
Supply Voltage (DC)	4.75V ~ 5.25V
Number of Outputs	4 Output
Number of Positions	14 Position
Clock Speed	42 MHz
Number of Bits	4 Bit
Voltage Nodes	5.00 V
Output Current Drive	-50.0 µA
Number of Inputs	2 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99

Product Description

The SN74LS90N is a Decade Counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the "90A and "LS90, divide-by-six for the "92A and "LS92 and the divide-by eight for the "93A and "LS93. All of these counters have a gated zero reset and the "90A and "LS90 also have gated set-to-nine inputs for use in BCD nine"s complement applications. To use their maximum count length (decade, divide-by-twelve or four-bit binary) of these counters, the CKB input is connected to the QA output. The input count pulses are applied to CKA input and the outputs are as described in the appropriate function table. A symmetrical divide-by-ten count can be obtained from the "90A or "LS90 counters by connecting the QD output to the CKA input and applying the input count to the CKB input which gives a divide-by-ten square wave at output QA.
TTL input compatible
CMOS output

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