SN74LV07AD - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LV07AD
Manufacturer

TI
ChipWorker Part#

CW42036393
Category

Logic Controller, Logic IC
Package

SOIC-14
Description

Buffer/Driver 6CH Non-Inverting Open Drain CMOS 14Pin SOIC Tube
Documentation

Datasheet

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SN74LV07AD Specifications

Attribute	Attribute Value

Part Number	SN74LV07AD
Manufacturer	TI
ChipWorker Part#	CW42036393
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	14 Pin
Case/Package	SOIC-14
Supply Voltage (DC)	2.00V ~ 5.50V
Number of Outputs	6 Output
Number of Circuits	6 Circuit
Number of Channels	6 Channel
Number of Positions	14 Position
Number of Bits	6 Bit
Propagation Delay Max (tpd)	8.50 ns
Voltage Nodes	5.00 V, 3.30 V, 2.50 V
Number of Gates	6 Gate
Output Current Drive	16.0 mA
Number of Inputs	6 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	2 V
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Size-Length	8.65 mm
Size-Width	3.91 mm
Size-Height	1.58 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LV07AD is a Hex Buffer/Driver with open-drain outputs and designed for 2 to 5.5V VCC operation. The SN74LV07A device performs the Boolean function Y = A in positive logic. The outputs of the SN74LV07A device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 16mA at 5V VCC. Inputs can be driven from 2.5/3.3/5V (CMOS) devices. This feature allows the use of the SN74LV07A device as a translator in a mixed-system environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outputs, thus preventing a damaging current backflow through the device when it is powered down.
Outputs are disabled during power up and power down with inputs tied to VCC
Support mixed-mode voltage operation on all ports
Latch-up performance exceeds 100mA per JESD 78, class II
>2.3V at VCC = 3.3V, TA = 25°C VOHV (Output VOH undershoot)
<0.8V at VCC = 3.3V, TA = 25°C VOLP (Output ground bounce)

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