SN74LVC16245ADGGR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC16245ADGGR
Manufacturer

TI
ChipWorker Part#

CW3724529
Category

Logic Controller, Logic IC
Package

TSSOP-48
Description

TEXAS INSTRUMENTS SN74LVC16245ADGGR Transceiver, 74LVC16245, 1.65V to 3.6V, TSSOP-48
Documentation

Datasheet

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SN74LVC16245ADGGR Specifications

Attribute	Attribute Value

Part Number	SN74LVC16245ADGGR
Manufacturer	TI
ChipWorker Part#	CW3724529
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	TSSOP-48
Supply Voltage (DC)	1.65V ~ 3.60V
Number of Outputs	16 Output
Number of Circuits	2 Circuit
Number of Channels	16 Channel
Number of Positions	48 Position
Number of Bits	16 Bit
Propagation Delay Max (tpd)	4.00 ns
Voltage Nodes	3.30 V, 2.70 V, 2.50 V, 1.80 V
Output Current Drive	-1.00 mA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	1.65 V
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Size-Length	12.6 mm
Size-Width	6.2 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LVC16245ADGGR is a 16-bit (dual-octal) non-inverting Bus Transceiver with 3-state outputs. This device is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control input. The output-enable input can be used to disable the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
IOFF Supports live insertion, partial-power-down mode and back-drive protection
Supports mixed-mode signal operation on all ports
Latch-up performance exceeds 250mA per JESD 17
Inputs accept voltages to 5.5V
4ns at 3.3V Propagation delay (tpd)
<0.8V at VCC = 3.3V, TA = 25°C VOLP (output ground bounce)
>2V at VCC = 3.3V, TA = 25°C VOHV (output VOH undershoot)
Green product and no Sb/Br

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