SN74LVC1G00DBVR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC1G00DBVR
Manufacturer

TI
ChipWorker Part#

CW1097000
Category

Logic Control, Logic Gate IC
Package

SOT-23-5
Description

NAND Gate 1Element 2IN CMOS 5Pin SOT-23 T/R
Documentation

Datasheet

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SN74LVC1G00DBVR Specifications

Attribute	Attribute Value

Part Number	SN74LVC1G00DBVR
Manufacturer	TI
ChipWorker Part#	CW1097000
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	5 Pin
Case/Package	SOT-23-5
Supply Voltage (DC)	5.00 V
Number of Outputs	1 Output
Output Current	32 mA
Number of Circuits	1 Circuit
Number of Positions	5 Position
Number of Bits	1 Bit
Propagation Delay Max (tpd)	4.00 ns
Number of Gates	1 Gate
Number of Inputs	2 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
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Size-Length	3.05 mm
Size-Width	1.6 mm
Size-Height	1.3 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LVC1G00DBVR is a Single 2-input Positive-NAND Gate, designed for 1.65 to 5.5V VCC operation. The SN74LVC1G00DBVR performs the Boolean function Y = A x B or Y = A + B in positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range. ESD protection exceeds JESD 22, 2000V human-body model (A114-A) and 1000V charged-device model (C101).
Supports 5V VCC operation
Inputs accept voltages to 5.5V
Provides down translation to VCC
Maximum TPD of 3.8ns at 3.3V
Low power consumption, 10µA maximum ICC
±24mA Output drive at 3.3V
Ioff supports live insertion, partial power-down mode operation and back-drive protection
Latch-up performance exceeds 100mA per JESD 78, class II
Green product and no Sb/Br
Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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