SN74LVC1G08DCKR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC1G08DCKR
Manufacturer

TI
ChipWorker Part#

CW21600
Category

Logic Control, Logic Gate IC
Package

SC-70-5
Description

AND Gate 1Element 2IN CMOS 5Pin SC-70 T/R
Documentation

Datasheet

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SN74LVC1G08DCKR Specifications

Attribute	Attribute Value

Part Number	SN74LVC1G08DCKR
Manufacturer	TI
ChipWorker Part#	CW21600
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	5 Pin
Case/Package	SC-70-5
Supply Voltage (DC)	1.65V ~ 5.50V
Number of Outputs	1 Output
Output Current	32 mA
Number of Circuits	1 Circuit
Number of Positions	5 Position
Number of Bits	1 Bit
Propagation Delay Max (tpd)	4.00 ns
Voltage Nodes	5.00 V, 3.30 V, 2.50 V, 1.80 V
Number of Gates	1 Gate
Output Current Drive	-1.00 mA
Number of Inputs	2 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
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Size-Length	2.15 mm
Size-Width	1.4 mm
Size-Height	1 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99
HK STC License	NLR

Product Description

The SN74LVC1G08DCKR is a single 2-input positive-AND gate IC, designed for 1.65 to 5.5V VCC operation. The device performs the Boolean function or in positive logic. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.
Supports 5V VCC Operation
Input Accepts Voltage to 5.5V
Provides Down Translation to VCC
3.6ns at 3.3V Maximum Propagation Delay Time
Low-power Consumption, 10µA Maximum ICC
±24mA Output Drive at 3.3V
Ioff Supports Live Insertion, Partial-power-down Mode and Back Drive Protection
Latch-up Performance Exceeds 100mA Per JESD 78, Class II
Green Product, No Sb/Br
Device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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