SN74LVC1G132DCKR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC1G132DCKR
Manufacturer

TI
ChipWorker Part#

CW6816671
Category

Logic Control, Logic Gate IC
Package

SC-70-5
Description

NAND Gate 1Element 2IN CMOS 5Pin SC-70 T/R
Documentation

Datasheet

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SN74LVC1G132DCKR Specifications

Attribute	Attribute Value

Part Number	SN74LVC1G132DCKR
Manufacturer	TI
ChipWorker Part#	CW6816671
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	5 Pin
Case/Package	SC-70-5
Supply Voltage (DC)	1.65V ~ 5.50V
Number of Outputs	1 Output
Output Current	32 A
Number of Circuits	1 Circuit
Number of Positions	5 Position
Number of Bits	1 Bit
Propagation Delay Max (tpd)	4.40 ns
Voltage Nodes	5.00 V, 3.30 V, 2.50 V, 1.80 V
Number of Gates	1 Gate
Output Current Drive	-1.00 mA
Number of Inputs	2 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
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Size-Length	2.15 mm
Size-Width	1.4 mm
Size-Height	1 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LVC1G132DCKR is a single 2-input NAND Gate with Schmitt-trigger Input designed for 1.65 to 5.5V VCC operation. The device performs the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic. Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT-) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Supports 5V VCC operation
Inputs accept voltages to 5.5V
Maximum tpd of 3.6ns at 3.3V
10µA Maximum ICC low power consumption
±24mA Output drive at 3.3V
Ioff supports partial-power-down mode operation
Latch-up performance exceeds 100mA per JESD 78, Class II
ESD protection exceeds JESD 22
Green product and no Sb/Br

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