SN74LVC1T45MDCKREP - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC1T45MDCKREP
Manufacturer

TI
ChipWorker Part#

CW3268078
Category

Logic Controller, Logic IC
Package

SC-70-6
Description

TEXAS INSTRUMENTS SN74LVC1T45MDCKREP Transceiver, 74LVC1T245, 1.65V to 5.5V, SC-70-6
Documentation

Datasheet

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SN74LVC1T45MDCKREP Specifications

Attribute	Attribute Value

Part Number	SN74LVC1T45MDCKREP
Manufacturer	TI
ChipWorker Part#	CW3268078
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	6 Pin
Case/Package	SC-70-6
Supply Voltage (DC)	1.65V ~ 5.50V
Number of Outputs	1 Output
Output Current	50 mA
Number of Circuits	1 Circuit
Number of Channels	1 Channel
Number of Positions	6 Position
Number of Bits	1 Bit
Propagation Delay Max (tpd)	6.90 ns
Voltage Nodes	1.80 V, 2.50 V, 3.30 V, 5.00 V
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
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Operating Temperature	-55℃ ~ 125℃ (TA)
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
Mil-Spec	Yes
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LVC1T45MDCKREP is an enhanced single-bit dual-supply Bus/Configurable Voltage Transceiver with 3-state outputs. This non-inverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 to 5.5V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.8/2.5/3.3/5V voltage nodes. It is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
VCC Isolation - If either VCC input Is at GND, both ports are in the high-impedance state
DIR Input circuit referenced to VCCA
IOFF Supports partial-power-down mode operation
Controlled baseline
One assembly/test site
One fabrication site
Extended life cycle
Latch-up performance exceeds 100mA per JESD 78, class II
4µA ICC Low power consumption
±24mA Output drive at 3.3V
Green product and no Sb/Br

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