SN74LVC2T45DCUR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC2T45DCUR
Manufacturer

TI
ChipWorker Part#

CW13205
Category

Voltage Level Translator IC
Package

VSSOP-8
Description

Bus Transceiver, LVC Family, 2Input, 50mA, 3.9ns, 1.65V to 5.5V, VSSOP-8
Documentation

Datasheet

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SN74LVC2T45DCUR Specifications

Attribute	Attribute Value

Part Number	SN74LVC2T45DCUR
Manufacturer	TI
ChipWorker Part#	CW13205
Category	Voltage Level Translator IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	VSSOP-8
Supply Voltage (DC)	1.65V ~ 5.50V
Output Current	50 mA
Number of Circuits	1 Circuit
Number of Channels	2 Channel
Number of Positions	8 Position
Number of Bits	2 Bit
Propagation Delay Max (tpd)	3.90 ns
Voltage Nodes	5.00 V
Output Current Drive	-1.00 mA
Number of Inputs	2 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Number of Output Channels	1 Channel
Supply Voltage	1.65V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
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Size-Length	3.15 mm
Size-Width	1.2 mm
Size-Height	2.9 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99

Product Description

The SN74LVC2T45DCUR is a 2-bit non-inverting Bus Transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 to 5.5V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.8, 2.5, 3.3 and 5 voltage nodes. The SN74LVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic high or low level applied to prevent excess ICC and ICCZ.
DIR Input circuit referenced to VCCA
Low power consumption
Ioff Supports partial-power-down mode operation
Latch-up performance exceeds 100mA per JESD, 78 class II
±24mA Output drive at 3.3V

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