SN74LVT244BDW - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVT244BDW
Manufacturer

TI
ChipWorker Part#

CW29970707
Category

Logic Controller, Logic IC
Package

SOIC-20
Description

Buffer / Line Driver, 74LVT244, 2.7V to 3.6V, SOIC-20
Documentation

Datasheet

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SN74LVT244BDW Specifications

Attribute	Attribute Value

Part Number	SN74LVT244BDW
Manufacturer	TI
ChipWorker Part#	CW29970707
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	20 Pin
Case/Package	SOIC-20
Supply Voltage (DC)	3.30 V, 3.60 V (max)
Number of Outputs	8 Output
Number of Circuits	8 Circuit
Number of Channels	8 Channel
Number of Positions	20 Position
Number of Bits	8 Bit
Voltage Nodes	3.30 V, 2.70 V
Quiescent Current	5 mA
Output Current Drive	-500 µA
Number of Inputs	8 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.7V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	2.7 V
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Size-Length	12.8 mm
Size-Width	7.52 mm
Size-Height	2.35 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99

Product Description

The SN74LVT244BDW is an octal Buffer/Line Driver designed specifically for low-voltage (3.3V) VCC operation, but with the capability to provide a TTL interface to a 5V system environment. It is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver. It is fully specified for hot-insertion applications using IOFF and power-up 3-state. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
Supports mixed-mode signal operation
IOFF and power-up 3-state support hot insertion
Supports unregulated battery operation down to 2.7V
Latch-up performance exceeds 100mA per JESD 78, class II
<0.8V at VCC = 3.3V, TA = 25°C VOLP (output ground bounce)
Green product and no Sb/Br

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