SN74LVT244BPWR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVT244BPWR
Manufacturer

TI
ChipWorker Part#

CW5658440
Category

Logic Controller, Logic IC
Package

TSSOP-20
Description

3.3V ABT Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40℃ to 85℃
Documentation

Datasheet

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SN74LVT244BPWR Specifications

Attribute	Attribute Value

Part Number	SN74LVT244BPWR
Manufacturer	TI
ChipWorker Part#	CW5658440
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	20 Pin
Case/Package	TSSOP-20
Supply Voltage (DC)	3.30 V, 3.60 V (max)
Number of Outputs	8 Output
Number of Channels	8 Channel
Number of Positions	20 Position
Number of Bits	8 Bit
Voltage Nodes	3.30 V, 2.70 V
Quiescent Current	5 mA
Output Current Drive	-500 µA
Number of Inputs	8 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.7V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	2.7 V
	expand all
Size-Length	6.6 mm
Size-Width	4.5 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

description/ordering information
This octal buffer and line driver is designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.
The SN74LVT244B is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OEis high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OEshould be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioff
and power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
Supports Mixed-Mode Signal Operation(5-V Input and Output Voltages With 3.3-V VCC)
Supports Unregulated Battery Operation Down to 2.7 V
Typical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°C
Ioff and Power-Up 3-State Support Hot Insertion
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)

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