SN74VMEH22501DGGR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74VMEH22501DGGR
Manufacturer

TI
ChipWorker Part#

CW4275103
Category

Logic Controller, Logic IC
Package

TSSOP-48
Description

TEXAS INSTRUMENTS SN74VMEH22501DGGR Bus Transceiver, 8Channels, 64mA, 3.15V to 3.45V, TSSOP-48
Documentation

Datasheet

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SN74VMEH22501DGGR Specifications

Attribute	Attribute Value

Part Number	SN74VMEH22501DGGR
Manufacturer	TI
ChipWorker Part#	CW4275103
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	TSSOP-48
Supply Voltage (DC)	3.15V ~ 3.45V
Number of Outputs	10 Output
Input Voltage (DC)	2.00 V
Output Voltage	2.4 V
Output Current	64 mA
Number of Circuits	1 Circuit
Number of Channels	8 Channel
Number of Positions	48 Position
Number of Bits	10 Bit
Propagation Delay Max (tpd)	14.5 ns
Voltage Nodes	3.30 V
Output Current Drive	-1.00 mA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	3.15V ~ 3.45V
Supply Voltage (Max)	3.45 V
Supply Voltage (Min)	3.15 V
Input Voltage	2 V
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Size-Length	12.6 mm
Size-Width	6.2 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74VMEH22501DGGR is a 8-bit Universal Bus Transceiver and two 1-bit bus transceivers with 3-state outputs. It is designed for 3.3V VCC operation with 5V tolerant inputs. The UBT™ transceiver allows transparent, latched and flip-flop modes of data transfer and the separate LVTTL input and outputs on the bus transceivers provide a feedback path for control and diagnostics monitoring. The high-speed backplane operation is a direct result of the improved OEC™ circuitry and high drive that has been designed and tested into the VME64x backplane model. The B-port I/Os are optimized for driving large capacitive loads and include pseudo-ETL input thresholds (1/2 VCC ±50mV) for increased noise immunity. These specifications support the 2eVME protocols in VME64x (ANSI/VITA 1.1) and 2eSST protocols in VITA 1.5. With proper design of a 21-slot VME system, a designer can achieve 320Mbytes transfer rates on linear backplanes and, possibly, 1Gbyte transfer rates on the VME320 backplan
Member of the Texas Instruments Widebus™ family
Bus transceiver split LVTTL port provides a feedback path for control and diagnostics monitoring
I/O Interfaces are 5V tolerant
Ioff, Power-up 3-state and BIAS VCC support live insertion
Bus hold on 3A-port data inputs
Flow-through architecture facilitates printed circuit board layout
Distributed VCC and GND pins minimize high-speed switching noise
Latch-up performance exceeds 100mA per JESD 78, Class II
26R Equivalent series resistor on 3A ports and Y outputs
Green product and no Sb/Br

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