SN75LVDS83BDGG - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN75LVDS83BDGG
Manufacturer

TI
ChipWorker Part#

CW3303345
Category

Interface IC, Interface Controller
Package

TSSOP-56
Description

10-135MHz 28Bit FlatLink LVDS Transmitter/Serializer 56-TSSOP -10 to 70
Documentation

Datasheet

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SN75LVDS83BDGG Specifications

Attribute	Attribute Value

Part Number	SN75LVDS83BDGG
Manufacturer	TI
ChipWorker Part#	CW3303345
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	56 Pin
Case/Package	TSSOP-56
Supply Voltage (DC)	3.00V (min)
Number of Positions	56 Position
Power Dissipation	1730 W
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	-10 ℃
Power Dissipation (Max)	1730 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Length	14.1 mm
Size-Width	6.1 mm
Size-Height	1.05 mm
Operating Temperature	-10℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN75LVDS83BDGG is a 10 to 135MHz FlatLink Transmitter with four 7-bit parallel-load serial-out shift registers, a 7X clock synthesizer and five low-voltage differential signalling (LVDS) line drivers in a single integrated circuit. These functions allow 28-bit of single-ended LVTTL data to be synchronously transmitted over five balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82 and LCD panels with integrated LVDS receiver. When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected via the clock select (CLKSEL) pin. The frequency of CLKIN is multiplied seven times and then used to unload the data registers in 7-bit slices and serially. The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.
LVDS Display series interfaces directly to LCD display panels with integrated LVDS
Consumes less than 1mW when disabled
Selectable rising or falling clock edge triggered
Support spread spectrum clocking (SSC)
Green product and no Sb/Br
This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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