STR912FAW47X6 - ST Microelectronics

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

STR912FAW47X6
Manufacturer

ST Microelectronics
ChipWorker Part#

CW61872517
Category

Microcontroller, MCU IC
Package

LQFP-128
Description

MCU 16Bit/32Bit ARM966E-S RISC 2Mb Flash 1.8V/3.3V 128Pin LQFP Tray
Documentation

Datasheet

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STR912FAW47X6 Specifications

Attribute	Attribute Value

Part Number	STR912FAW47X6
Manufacturer	ST Microelectronics
ChipWorker Part#	CW61872517
Category	Microcontroller, MCU IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	128 Pin
Case/Package	LQFP-128
Frequency	96 MHz
Supply Voltage (DC)	2.00V (max)
Number of Positions	128 Position
Clock Speed	96.0 MHz
RAM Memory Size	96 KB
Number of Bits	32 Bit
Number of ADCs	1 ADC
Number of Inputs and Outputs	80 Input IO
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 3.6V
Supply Voltage (Max)	2 V
Supply Voltage (Min)	1.62 V
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Size-Length	14 mm
Size-Width	14 mm
Size-Height	1.4 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	3A991A2

Product Description

STR91xFA is a series of ARM®-powered microcontrollers which combines a 16/32-bit ARM966E-S RISC processor core, dual-bank Flash memory, large SRAM for data or code, and a rich peripheral set to form an ideal embedded controller for a wide variety of applications such as point-of-sale terminals, industrial automation, security and surveillance, vending machines, communication gateways, serial protocol conversion, and medical equipment. The ARM966E-S core can perform single-cycle DSP instructions, good for speech processing, audio algorithms, and low-end imaging.
**Key Features**
16/32-bit 96 MHz ARM9E based MCU
ARM966E-S™ RISC core: Harvard archi-tecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)
STR91xFA implementation of core adds high-speed burst Flash memory interface, instruction prefetch queue, branch cache
Up to 96 MIPS directly from Flash memory
Single-cycle DSP instructions supported
Binary compatible with ARM7 code
Dual burst Flash memories, 32-bits wide
256 KB/512 KB/1 MB/2 MB main Flash
32 KB/128 KB secondary Flash
Sequential Burst operation up to 96 MHz
100 K min erase cycles, 20 yr min retention
SRAM, 32-bits wide
64K or 96K bytes, optional battery backup
9 programmable DMA channels
Clock, reset, and supply management
Internal oscillator operating with external 4-25 MHz crystal
Internal PLL up to 96 MHz
Real-time clock provides calendar functions, tamper, and wake-up functions
Reset Supervisor monitors supply voltage, watchdog, wake-up unit, external reset
Brown-out monitor
Run, Idle, and Sleep Mode as low as 50 uA
Vectored interrupt controller (VIC)
32 IRQ vectors, 30 interrupt pins
Branch cache minimizes interrupt latency
8-channel, 10-bit A/D converter (ADC)
0 to 3.6 V range, 0.7 usec conversion
10 Communication interfaces
10/100 Ethernet MAC with DMA and MII
USB Full-speed (12 Mbps) slave device
CAN interface (2.0B Active)
3 16550-style UARTs with IrDA protocol
2 Fast I2C, 400 kHz
2 channels for SPI, SSI™, or MICROWIRE™
External Memory Interface (EMI)
8- or 16-bit data, up to 24-bit addressing
Static Async modes for LQFP128
Additional burst synchronous modes for LFBGA144
Up to 80 I/O pins (muxed with interfaces)
16-bit standard timers (TIM)
4 timers each with 2 input capture, 2 output compare, PWM and pulse count modes
3-Phase induction motor controller (IMC)
JTAG interface with boundary scan
Embedded trace module (ARM® ETM9™)

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