TCA4311ADR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TCA4311ADR
Manufacturer

TI
ChipWorker Part#

CW35606693
Category

Interface IC, Interface Controller
Package

SOIC-8
Description

I²C Logic Buffer 3.3V/5V 8Pin SOIC T/R
Documentation

Datasheet

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TCA4311ADR Specifications

Attribute	Attribute Value

Part Number	TCA4311ADR
Manufacturer	TI
ChipWorker Part#	CW35606693
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	SOIC-8
Supply Voltage (DC)	2.70V ~ 5.50V
Number of Outputs	2 Output
Supply Current	5.1 mA
Number of Channels	1 Channel
Number of Positions	8 Position
Input Capacitance	10 pF
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.7V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	2.7 V
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Size-Height	1.5 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The TCA4311ADR is a hot-swappable I²C Bus Buffer that supports I/O card insertion into a live backplane without corruption of the data and clock busses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, this device provides bidirectional buffering, keeping the backplane and card capacitances isolated. During insertion, the SDA and SCL lines are pre-charged to 1V to minimize the current required to charge the parasitic capacitance of the chip. When the I²C bus is idle, the buffer can be put into shutdown mode by setting the EN pin low. When EN is high, the buffer resumes normal operation. It also includes an open drain READY output pin, which indicates that the backplane and card sides are connected together. The size of the pull-up resistors to the I/Os depends on the system, but each side of this buffer must have a pull-up resistor.
Supports bidirectional data transfer of I²C bus signals
SDA and SCL lines are buffered which increases fan-out
SDA and SCL input lines are isolated from outputs
Accommodates standard-mode and fast-mode I²C devices
Improved noise immunity
Applications include hot board insertion and bus extension
Low ICC chip disable of <1µA
READY open-drain output
Supports clock stretching, arbitration and synchronization
Powered-OFF high-impedance I²C-bus pins
Open-drain I²C pins
Latch-up performance exceeds 100mA per JESD 78, class II
ESD Protection exceeds JESD 22
Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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