TFP401AMPZPEP - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TFP401AMPZPEP
Manufacturer

TI
ChipWorker Part#

CW3751104
Category

Interface IC, Interface Controller
Package

HTQFP-100
Description

Digital Receiver 3RX 1.65Gbps 100Pin HTQFP EP Tray
Documentation

Datasheet

TFP401AMPZPEP Global Supplier

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TFP401AMPZPEP Specifications

Attribute	Attribute Value

Part Number	TFP401AMPZPEP
Manufacturer	TI
ChipWorker Part#	CW3751104
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	100 Pin
Case/Package	HTQFP-100
Supply Voltage (DC)	3.00V (min)
Supply Current	370 mA
Number of Positions	100 Position
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Height	1.05 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The TFP401AMPZPEP is a TI PanelBus™ Flat-panel Display part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP401A finds applications in any design requiring high-speed digital interface. The TFP401A supports display resolutions up to 1080p and WUXGA in 24-bit true colour pixel format. It offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels and provides an option for time staggered pixel outputs for reduced ground bounce. PowerPAD™ advanced packaging technology results in best of class power dissipation, footprint and ultra-low ground inductance. It combines PanelBus™ circuit innovation with TI-s advanced 0.18-mm EPIC-5™ CMOS process technology.
Supports pixel rates up to 165MHz
Digital visual interface (DVI) specification compliant
Laser trimmed internal termination resistors for optimum fixed impedance matching
Skew tolerant up to one pixel-clock cycle
4x Over-sampling
Reduced power dissipation
Reduced ground bounce using time-staggered pixel outputs
Low noise and power dissipation
Advanced technology using TI 0.18-mm EPIC-5 CMOS process

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