TL082ACP - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TL082ACP
Manufacturer

TI
ChipWorker Part#

CW3738490
Category

Operational Amplifier, OP Amp IC
Package

PDIP-8
Description

Operational Amplifier, Dual, 2 Amplifier, 3MHz, 13V/µs, 7V to 36V, DIP, 8Pins
Documentation

Datasheet

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TL082ACP Specifications

Attribute	Attribute Value

Part Number	TL082ACP
Manufacturer	TI
ChipWorker Part#	CW3738490
Category	Operational Amplifier, OP Amp IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	8 Pin
Case/Package	PDIP-8
Supply Voltage (DC)	15.0 V
Supply Current	1.4 mA
Number of Circuits	2 Circuit
Number of Channels	2 Channel
Number of Positions	8 Position
Power Dissipation	680 mW
Common Mode Rejection Ratio	75dB ~ 86dB
Input Offset Drift	18.0 µV/K
Bandwidth	3 MHz
Slew Rate	13.0 V/μs
Gain Bandwidth Product	3 MHz
Input Offset Voltage	3 mV
Input Bias Current	30 pA
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Gain Bandwidth	3 MHz
Minimum CMRR Range	75 dB
Supply Voltage	7V ~ 36V
Supply Voltage (Max)	36 V
Supply Voltage (Min)	7 V
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Size-Length	9.81 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
HK STC License	NLR

Product Description

The TL082ACP is a JFET-input Operational Amplifier designed to offer a wider selection than any previously developed operational amplifier family. The JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents and low offset-voltage temperature coefficient.
1.4mA/channel Typical low power consumption
Wide common-mode and differential voltage range
30pA Typical low input bias current
5pA Typical low input offset current
Output short-circuit protection
0.003% Typical low total harmonic distortion
JFET input stage high input impedance
Latch-up-free operation
This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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