TLV320ADC3101IRGER - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TLV320ADC3101IRGER
Manufacturer

TI
ChipWorker Part#

CW2357404
Category

DA Converter, AD Converter IC
Package

VQFN-24
Description

Dual ADC Delta-Sigma 96KSPS 16Bit Serial 24Pin VQFN EP T/R
Documentation

Datasheet

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TLV320ADC3101IRGER Specifications

Attribute	Attribute Value

Part Number	TLV320ADC3101IRGER
Manufacturer	TI
ChipWorker Part#	CW2357404
Category	DA Converter, AD Converter IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	24 Pin
Case/Package	VQFN-24
Number of Channels	3 Channel
Power Dissipation	1700 W
Sample Rate	96 Ksps
Power Consumption	17.0 mW
Number of ADCs	2 ADC
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	1700 mW
Number of Input Channels	3, 6 Channel
Supply Voltage	1.8V, 3.3V
Input Voltage	0.707 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free

Product Description

The TLV320ADC3101 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, 6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101 ideal for battery-powered portable equipment.
The AGC programs to a wide range of attack (7 ms to 1.4 s) and decay (50 ms to 22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.
A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

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