TMS320DM647ZUT7 - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TMS320DM647ZUT7
Manufacturer

TI
ChipWorker Part#

CW18545676
Category

DSP, Digital Signal Processor
Package

FCBGA-529
Description

DSP Fixed-Point 32Bit 720MHz 5760MIPS 529Pin FCBGA
Documentation

Datasheet

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TMS320DM647ZUT7 Specifications

Attribute	Attribute Value

Part Number	TMS320DM647ZUT7
Manufacturer	TI
ChipWorker Part#	CW18545676
Category	DSP, Digital Signal Processor
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	529 Pin
Case/Package	FCBGA-529
Frequency	720 MHz
Clock Speed	900 MHz
RAM Memory Size	320 KB
Operating Temperature (Max)	90 ℃
Operating Temperature (Min)	0 ℃
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Operating Temperature	0℃ ~ 90℃
Product Lifecycle Status	Not Recommended for New Designs
Packaging	Tray
RoHS	Non-Compliant
Lead-Free Status	Contains Lead
ECCN Code	3A991.a.2

Product Description

* High-Performance Digital Media Processor * 720-MHz, 800-MHz, 900-MHz, 1.1-GHz C64x+™ Clock Rates * 1.39 ns (-720), 1.25 ns (-800), 1.11 ns (-900), 0.91 ns (-1100) Instruction Cycle Time * 5760, 6400, 7200, 8800 MIPS * Eight 32-Bit C64x+ Instructions/Cycle * Fully Software-Compatible With C64x/Debug * Commercial Temperature Ranges (-720, -900, and -1100 only) * Extended Temperature Ranges (-800 only) * Industrial Temperature Ranges (-720, -900, and -1100 only) * VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core * Eight Highly Independent Functional Units With VelociTI.2 Extensions: * Six ALUs (32-/40-Bit), Each Supports Single 32-bit, Dual 16-bit, or Quad 8-bit Arithmetic per Clock Cycle * Two Multipliers Support Four 16 x 16-bit Multiplies (32-bit Results) per Clock Cycle or Eight 8 x 8-bit Multiplies (16-Bit Results) per Clock Cycle * Load-Store Architecture With Non-Aligned Support * 64 32-bit General-Purpose Registers * Instruction Packing Reduces Code Size * All Instructions Conditional * Additional C64x+™ Enhancements * Protected Mode Operation * Exceptions Support for Error Detection and Program Redirection * Hardware Support for Modulo Loop Auto-Focus Module Operation * C64x+ Instruction Set Features * Byte-Addressable (8-/16-/32-/64-bit Data) * 8-bit Overflow Protection * Bit-Field Extract, Set, Clear * Normalization, Saturation, Bit-Counting * VelociTI.2 Increased Orthogonality * C64x+ Extensions * Compact 16-bit Instructions * Additional Instructions to Support Complex Multiplies * C64x+ L1/L2 Memory Architecture * 256K-bit (32K-byte) L1P Program RAM/Cache [Direct Mapped] * 256K-bit (32K-byte) L1D Data RAM/Cache [2-Way Set-Associative] * 2M-bit/256K-byte (DM647) or 4M-Bit/512K-byte) (DM648) L2 Unified Mapped RAM/Cache [Flexible Allocation] * Supports Little Endian Mode Only * Five Configurable Video Ports * Providing a Glueless I/F to Common Video Decoder and Encoder Devices * Supports Multiple Resolutions/Video Standards

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