TPIC6273N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TPIC6273N
Manufacturer

TI
ChipWorker Part#

CW4780410
Category

Flip Flop IC
Package

PDIP-20
Description

Latch, D Type, Standard, 625ns, 250mA, DIP
Documentation

Datasheet

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TPIC6273N Specifications

Attribute	Attribute Value

Part Number	TPIC6273N
Manufacturer	TI
ChipWorker Part#	CW4780410
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	20 Pin
Case/Package	PDIP-20
Supply Voltage (DC)	4.50V (min)
Number of Outputs	8 Output
Output Voltage	45 V
Output Current	250 mA
Number of Circuits	1 Circuit
Number of Positions	20 Position
Drain to Source Resistance (on) (Rds)	1.30 mΩ
Number of Bits	8 Bit
Number of Inputs	8 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	4.5V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
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Size-Length	24.33 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Weight	0.0191855977428 kg
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99

Product Description

The TPIC6273N is a monolithic high-voltage high-current power logic octal D Latch with DMOS transistor outputs designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids and other medium-current or high-voltage loads. The TPIC6273 contains eight positive-edge-triggered D-type flip-flops with a direct clear input. Each flip-flop features an open-drain power DMOS transistor output. When clear (CLR\\) is high, information at the D inputs meeting the setup time requirements is transferred to the DRAIN outputs on the positive-going edge of the clock pulse. clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input (CLK) is at either the high or low level, the D input signal has no effect at the output.
Eight power DMOS transistor outputs
Low power consumption
Output clamp voltage up to 45V
1.3R Typical low rDS(on)
75mJ Avalanche energy
1.5A Pulsed current per output

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