TPIC6A595DW - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TPIC6A595DW
Manufacturer

TI
ChipWorker Part#

CW8555763
Category

Counter, Counter IC
RoHS

Lead free / RoHS Compliant
Description

8Bit Shift Register 24-SOIC -40℃ to 125℃
Documentation

Datasheet

TPIC6A595DW Global Supplier

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TPIC6A595DW Specifications

Attribute	Attribute Value

Part Number	TPIC6A595DW
Manufacturer	TI
ChipWorker Part#	CW8555763
Category	Counter, Counter IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	24 Pin
Case/Package	SOIC-24
Supply Voltage (DC)	4.50V (min)
Number of Outputs	9 Output
Output Voltage	≤50.0 V
Number of Circuits	1 Circuit
Number of Positions	24 Position
Number of Bits	8 Bit
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	4.5V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
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Size-Length	15.4 mm
Size-Width	7.52 mm
Size-Height	2.35 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The TPIC6A595DW is a 8-bit Shift Register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids and other medium-current or high-voltage loads. Each open-drain DMOS transistor features an independent chopping current-limiting circuit to prevent damage in the case of a short circuit. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit, D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (SRCLR\\) is high. When SRCLR\ is low, the input shift register is cleared. When output enable (G\\) is held high, all data in the output buffers is held low and all drain outputs are off.
Output short-circuit protection
Eight 350mA DMOS outputs
Cascadable
Low power consumption
75mJ Avalanche energy
Green product and no Sb/Br

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