SN65DSI84TPAPRQ1 ,FlatLink, LVDS IC - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

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59 points

Part No

SN65DSI84TPAPRQ1
Manufacturer

TI
ChipWorker Part#

CW4041763
Category

FlatLink, LVDS IC
Package

TQFP-64
Description

TEXAS INSTRUMENTS SN65DSI84TPAPRQ1 Interface Bridges, DSI to LVDS, 1.65V, 1.95V, HTQFP, 64Pins, -40℃ New
Ships from

Moscow
Наличие

6 pcs In Stock
Estimated Price

$ 8.14

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SN65DSI84TPAPRQ1 Specifications

Consulting Engineer >>

Attribute	Attribute Value

Part Number	SN65DSI84TPAPRQ1
Manufacturer	TI
ChipWorker Part#	CW4041763
Category	FlatLink, LVDS IC
Mounting Style	Surface Mount
Number of Pins	64 Pin
Case/Package	TQFP-64
Supply Voltage (DC)	1.65V (min)
Operating Temperature (Max)	105 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 1.95V
Supply Voltage (Max)	1.95 V
Supply Voltage (Min)	1.65 V
	expand all
Product Lifecycle Status	Active
Packaging	Cut Tape (CT)
RoHS	RoHS Compliant
Lead-Free Status
REACH SVHC Compliance Edition	2016/06/20
ECCN Code	EAR99

Similar & Replacement Parts

Product Description

The SN65DSI84-Q1 DSI-to-LVDS bridge features a single-channel MIPI D-PHY receiver front-end configuration with four lanes per channel operating at 1 Gbps per lane and a maximum input bandwidth of 4 Gbps. The bridge decodes MIPI DSI 18-bpp RGB666 and 24-bpp RGB888 packets and converts the formatted video data-stream to an LVDS output operating at pixel clocks operating from 25 MHz to 154 MHz, offering a dual-link LVDS or single-link LVDS with four data lanes per link.
The SN65DSI84-Q1 device is well suited for WUXGA (1920 × 1080) at 60 frames per second (fps) with up to 24 bits-per-pixel (bpp). Partial line buffering is implemented to accommodate the data stream mismatch between the DSI and LVDS interfaces.
The SN65DSI84-Q1 device is implemented in a small outline 10 mm × 10 mm HTQFP package with a 0.5-mm pitch, and operates across a temperature range from –40°C to 105°C.

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