SN74LVC1G74RSE2 - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC1G74RSE2
Manufacturer

TI
ChipWorker Part#

CW53114996
Category

Flip Flop IC
Package

UQFN-8
Description

Flip Flop D-Type Pos-Edge 1Element 8Pin UQFN T/R
Documentation

Datasheet

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SN74LVC1G74RSE2 Specifications

Attribute	Attribute Value

Part Number	SN74LVC1G74RSE2
Manufacturer	TI
ChipWorker Part#	CW53114996
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	UQFN-8
Number of Outputs	1 Output
Number of Circuits	1 Circuit
Clock Speed	200 MHz
Number of Bits	1 Bit
Propagation Delay Max (tpd)	4.40 ns
Number of Gates	2 Gate
Input Capacitance	5 pF
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
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Operating Temperature	-40℃ ~ 85℃ (TA)
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	EAR99

Product Description

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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