TL16C752BTPTREP - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TL16C752BTPTREP
Manufacturer

TI
ChipWorker Part#

CW6682742
Category

UART Chip, UART Interface IC
Package

LQFP-48
Description

TEXAS INSTRUMENTS TL16C752BTPTREP UART Interface, 2Channel, 3Mbps, 2.7V, 3.6V, LQFP, 48Pins
Documentation

Datasheet

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TL16C752BTPTREP Specifications

Attribute	Attribute Value

Part Number	TL16C752BTPTREP
Manufacturer	TI
ChipWorker Part#	CW6682742
Category	UART Chip, UART Interface IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	LQFP-48
Supply Voltage (DC)	2.70V (min)
Operating Voltage	3.30 V
Supply Current	20 mA
Number of Channels	2 Channel
Data Rate	3.00 Mbps
Operating Temperature (Max)	105 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.7V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	2.7 V
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Operating Temperature	-40℃ ~ 105℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

description
The TL16C752B-EP is a dual-universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs,
automatic hardware/software flow control, and data rates up to 3 Mbps. The TL16C752B-EP offers enhanced features. It has a transmission control register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during hardware and software flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one access.
Controlled Baseline
– One Assembly/Test Site, One Fabrication Site
Extended Temperature Performance of –40°C to 110°C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product Change Notification
Qualification Pedigree†
Pin Compatible With ST16C2550 With Additional Enhancements
Up to 1.5-Mbps Baud Rate When Using Crystal (24-MHz Input Clock)
Up to 3-Mbps Baud Rate When Using Oscillator or Clock Source (48-MHz Input Clock)
64-Byte Transmit FIFO
64-Byte Receive FIFO With Error Flags
Programmable and Selectable Transmit and Receive FIFO Trigger Levels for DMA and nterrupt Generation
Programmable Receive FIFO Trigger Levels for Software/Hardware Flow Control
Software/Hardware Flow Control
– Programmable Xon/Xoff Characters
– Programmable Auto-RTSand Auto-CTS
Optional Data Flow Resume by Xon Any Character
DMA Signaling Capability for Both Received and Transmitted Data
Supports 3.3-V Operation
Software Selectable Baud Rate Generator
Prescaler Provides Additional Divide By Four Function
Fast Access Time 2 Clock Cycle IOR/IOW Pulse Width
Programmable Sleep Mode
Programmable Serial Interface Characteristics
– 5-, 6-, 7-, or 8-Bit Characters
– Even, Odd, or No Parity Bit Generation and Detection
– 1, 1.5, or 2 Stop Bit Generation
False Start Bit Detection
Complete Status Reporting Capabilities in Both Normal and Sleep Mode
Line Break Generation and Detection
Internal Test and Loopback Capabilities
Fully Prioritized Interrupt System Controls
Modem Control Functions (CTS, RTS, DSR, DTR, RI, and CD)

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