AD5582YRVZ - ADI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

AD5582YRVZ
Manufacturer

ADI
ChipWorker Part#

CW554700
Category

Digital to Analog, DAC IC
Package

TSSOP-48
Description

DAC 4CH R-2R 12Bit 48Pin TSSOP Tube
Documentation

Datasheet

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AD5582YRVZ Specifications

Attribute	Attribute Value

Part Number	AD5582YRVZ
Manufacturer	ADI
ChipWorker Part#	CW554700
Category	Digital to Analog, DAC IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	TSSOP-48
Number of Outputs	4 Output
Supply Current	2.3 mA
Number of Channels	4 Channel
Number of Positions	48 Position
Number of Bits	12 Bit
Power Dissipation	52.5 mW
Sample Rate	200 ksps
Resolution (Bits)	12.0 Bit
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	52.5 mW
Number of DACs	4 DAC
Supply Voltage (Max)	16.5 V
Supply Voltage (Min)	3 V
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Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
Mil-Spec	No
REACH SVHC Compliance Edition	2015/12/17

Product Description

The AD5582YRVZ is a quad 12-bit voltage output Digital-to-analog Converter (DAC) designed to operate from a single 5 to 15V or dual ±5V supply. It offers the user ease of use in single- or dual-supply systems. Built using an advance BiCMOS process, this high performance DAC is dynamically stable, capable of high current drive and in small form factor. The applied external reference VREF determines the full-scale output voltage ranges from VSS to VDD, resulting in a wide selection of full-scale outputs. Two built-in precision trimmed resistors are available and can be configured easily to provide 4-quadrant multiplications. A doubled-buffered parallel interface offers a fast settling time. A common level sensitive load DAC strobe (LDAC) input allows additional simultaneous update of all DAC outputs. An external asynchronous reset (RS) forces all registers to the zero code state when the MSB = 0 or to midscale when the MSB = 1.
Double buffered registers enable independent or simultaneous multichannel update
4 Independent rail-to-rail reference inputs
20mA High current output drive
Parallel interface
Data read-back capability
5µs Settling time
Built-in matching resistor simplifies negative reference
Unconditionally stable under any capacitive loading

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- Carefully tested and packaged by ChipWorker
- Vacuum packed
- Anti-static packaging
- Anti-vibration foam
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- Decapsulation control
- X-ray inspection
- XRF inspection
- Electrical testing
- Surface testing

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