ADV3003ACPZ - ADI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

ADV3003ACPZ
Manufacturer

ADI
ChipWorker Part#

CW384283
Category

Interface IC, Interface Controller
Package

LFCSP-40
Description

ANALOG DEVICES ADV3003ACPZ HDMI/DVI TMDS EQUALIZER, 3.6V, LFCSP-40
Documentation

Datasheet

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ADV3003ACPZ Specifications

Attribute	Attribute Value

Part Number	ADV3003ACPZ
Manufacturer	ADI
ChipWorker Part#	CW384283
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	40 Pin
Case/Package	LFCSP-40
Supply Voltage (DC)	3.00V (min)
Number of Outputs	1 Output
Supply Current	66 mA
Number of Channels	1 Channel
Number of Positions	40 Position
Power Dissipation	2000 mW
Number of Inputs	1 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	2000 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
Input Voltage	3.3 V
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Size-Length	6 mm
Size-Width	6 mm
Size-Height	0.95 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Cut Tape (CT)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

The ADV3003ACPZ is a 4-channel Transition Minimized Differential Signaling (TMDS) Buffer featuring equalized inputs and pre-emphasized outputs. The ADV3003 features 50R input and output terminations, providing full-swing output signal recovery and minimizing reflections for improved system signal integrity. It is targeted at HDMI™/DVI applications and is ideal for use in systems with long cable runs, long PCB traces and designs with interior cabling. The primary function of the ADV3003 is to buffer the four high speed channels of a single HDMI or DVI link. The HDMI/DVI link consists of four differential, high speed channels and four auxiliary single-ended, low speed control signals. The high speed channels include a data-word clock and three transition minimized differential signalling (TMDS) data channels running at 10x the data-word clock frequency for data rates up to 2.25Gbps.
One input, one output HDMI/DVI high speed signal equalizer/driver
Enables HDMI 1.3 receive-compliant input
Four TMDS channels per input/output
Fully buffered unidirectional inputs/outputs
Pre-emphasized outputs
Low added jitter
Transmitter disable feature
Reduces power dissipation
Disables input terminations
Supports 250Mbps to 2.25Gbps data rates
Supports 25 to 225MHz pixel clocks
Matched 50R input and output on-chip terminations

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