CD4099BE - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD4099BE
Manufacturer

TI
ChipWorker Part#

CW12105431
Category

Latche IC
Package

DIP-16
Description

Latch Addressable 8Channel D-Type 16Pin Plastic Dip Tube
Documentation

Datasheet

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CD4099BE Specifications

Attribute	Attribute Value

Part Number	CD4099BE
Manufacturer	TI
ChipWorker Part#	CW12105431
Category	Latche IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Digital Logic Level	CMOS
Supply Voltage (DC)	15.0 V, 18.0 V (max)
Number of Outputs	8 Output
Output Current	6.8 mA
Number of Circuits	2 Circuit
Number of Channels	8 Channel
Number of Positions	16 Position
Number of Bits	8 Bit
Polarity	Non-Inverting
Voltage Nodes	5.00 V, 10.0 V, 15.0 V
Power Dissipation	500 mW
Quiescent Current	80.0 nA
Input Capacitance	5.00 pF
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 18V
Supply Voltage (Max)	18 V
Supply Voltage (Min)	3 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The CD4099BE is a 8-bit CMOS Addressable Latch can perform a variety of functions. Data are inputted to a particular bit in the latch when that bit is addressed (by means of input A0, A1, A2) and when WD is at a low level. When WD is high, data entry is inhibited, however, all 8 outputs can be continuously read independent of WD and address inputs. A master RESET input is available, which RESETs all bits to a logic 0 level when RESET and WD are at a high level. When RESET is at a high level and WRITE RESET is at a low level, the latch acts as a 1-of-8 demultiplexer, the bit that is addressed has an active output which follows the data input, while all unaddressed bits are held to a logic 0 level.
Serial data input
Active parallel output
Storage register capability
Master clear
Can function as demultiplexer
Standardized, symmetrical output characteristics
100% Tested for quiescent current at 20V

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