DRV8305NQPHPRQ1 - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

DRV8305NQPHPRQ1
Manufacturer

TI
ChipWorker Part#

CW18099024
Category

Motor Driver
Package

TQFP-48
Description

3-Phase Gate Driver 4.3V to 45V 48Pin HTQFP T/R
Documentation

Datasheet

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DRV8305NQPHPRQ1 Specifications

Attribute	Attribute Value

Part Number	DRV8305NQPHPRQ1
Manufacturer	TI
ChipWorker Part#	CW18099024
Category	Motor Driver
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	TQFP-48
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	4.4V ~ 45V
	expand all
Operating Temperature	-40℃ ~ 150℃ (TJ)
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	EAR99

Product Description

The DRV8305-Q1 device is a gate driver IC for three-phase motor-drive applications. The device provides three high-accuracy half-bridge drivers, each capable of driving a high-side and low-side N-channel MOSFET. A charge pump driver supports 100% duty cycle and low-voltage operation for cold crank situations. The device can tolerate load dump voltages up to 45-V.
The DRV8305-Q1 device includes three bidirectional current-shunt amplifiers for accurate low-side current measurements that support variable gain settings and an adjustable offset reference.
The DRV8305-Q1 device has an integrated voltage regulator to support an MCU or other system power requirements. The voltage regulator can be interfaced directly with a LIN physical interface to allow low-system standby and sleep currents.
The gate driver uses automatic handshaking when switching to prevent current shoot through. The VDS of both the high-side and low-side MOSFETs is accurately sensed to protect the external MOSFETs from overcurrent conditions. The SPI provides detailed fault reporting, diagnostics, and device configurations such as gain options for the current shunt amplifier, individual MOSFET overcurrent detection, and gate-drive slew-rate control.
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