DS90LV049TMT - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

DS90LV049TMT
Manufacturer

TI
ChipWorker Part#

CW27289441
Category

Interface IC, Interface Controller
Package

TSSOP-16
Description

LVDS Driver/Receiver 400Mbps 0.45V 16Pin TSSOP Tube
Documentation

Datasheet

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DS90LV049TMT Specifications

Attribute	Attribute Value

Part Number	DS90LV049TMT
Manufacturer	TI
ChipWorker Part#	CW27289441
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	TSSOP-16
Supply Voltage (DC)	3.00V (min)
Number of Channels	4 Channel
Number of Positions	16 Position
Power Dissipation	866 W
Power Consumption	70.0 W
Input Current (Min)	12 μA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	866 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	Non-Compliant
Lead-Free Status	Contains Lead
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	5A991.b.1

Product Description

The DS90LV049TMT is a dual CMOS flow-through differential Line Driver and Receiver Pair designed for applications requiring ultra low power dissipation, exceptional noise immunity and high data throughput. The device is designed to support data rates in excess of 400Mbps utilizing low voltage differential signalling (LVDS) technology. It accepts LVTTL/LVCMOS signals and translates them to LVDS signals. On the other hand, the receiver accepts LVDS signals and translates them to 3V CMOS signals. The LVDS input buffers have internal failsafe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049 supports a tri-state function for a low idle power state when the device is not in use. The EN and EN inputs are ANDed together and control the tri-state outputs. The enables are common to all four gates.
Flow-through pin-out simplifies PCB layout
Tri-state output control
Internal failsafe biasing of receiver inputs
High impedance on LVDS outputs on power-down
Low power dissipation (70mW at 3.3V static)
50ps Typical driver channel-to-channel skew
50ps Typical receiver channel-to-channel skew

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