FAN73833MX - Fairchild

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

FAN73833MX
Manufacturer

Fairchild
ChipWorker Part#

CW48473493
Category

FET Driver
Package

SOIC-8
Description

MOSFET DRVR 600V 0.65A 2Out Hi/Lo Side Half Brdg Non-Inv 8Pin SOIC N T/R
Documentation

Datasheet

FAN73833MX Global Supplier

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FAN73833MX Specifications

Attribute	Attribute Value

Part Number	FAN73833MX
Manufacturer	Fairchild
ChipWorker Part#	CW48473493
Category	FET Driver
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	SOIC-8
Supply Voltage (DC)	15.0V (min)
Rise/Fall Time	50ns, 30ns
Number of Outputs	2 Output
Output Current	650 mA
Supply Current	0.75 mA
Number of Positions	8 Position
Power Dissipation	0.625 W
Rise Time	100 ns
Output Current (Max)	0.65 A
Fall Time	80 ns
Fall Time (Max)	80 ns
Fall Time (Max)	100 ns
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	625 mW
Supply Voltage	15V ~ 20V
Supply Voltage (Max)	20 V
Supply Voltage (Min)	15 V
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Size-Length	5.12 mm
Size-Width	4.15 mm
Size-Height	1.75 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15

Product Description

The FAN73833MX is an input logic compatible Half-bridge Gate-Drive with fixed dead-time. It is a half-bridge gate-driver IC for driving MOSFETs and IGBTs operating up to 600V. Its high-voltage process and common-mode noise cancelling technique provide stable operation of high-side driver under high-dv/dt noise circumstances. The UVLO circuits for both channels prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 350/650mA, respectively, which is suitable for all kinds of half- and full-bridge inverters.
Extended allowable negative VS swing to -9.8V for signal propagation at VDD=VBS=15V
Outputs in phase with input signals
Built-in UVLO functions for both channels
Built-in shoot-through prevention circuit
Built-in common-mode dv/dt noise cancelling circuit
Internal dead time (400ns typical)

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