SN65LVDS104PWR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN65LVDS104PWR
Manufacturer

TI
ChipWorker Part#

CW5191729
Category

Interface IC, Interface Controller
Package

TSSOP-16
Description

TEXAS INSTRUMENTS SN65LVDS104PWR Repeater IC, LVDS 10x 4Port LVDS & 4Port TTL-to-LVDS, 400Mbps, 3V to 3.6V, TSSOP-16
Documentation

Datasheet

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SN65LVDS104PWR Specifications

Attribute	Attribute Value

Part Number	SN65LVDS104PWR
Manufacturer	TI
ChipWorker Part#	CW5191729
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	TSSOP-16
Frequency	400 MHz
Supply Voltage (DC)	3.30 V
Number of Outputs	4 Output
Supply Current	23 mA
Power Dissipation	774 mW
Input Capacitance	3 pF
Input Current (Min)	20 µA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	774 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/06/15

Product Description

DESCRIPTION
The SN65LVDS104 and SN65LVDS105 are a differ ential line receiver and a LVTTL input (respectively)
connected to four differential line drivers that implement the electrical characteristics of low-voltage
differential signaling (LVDS). LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers
low-power, low-noise coupling, and switching speeds to transmit data at relatively long distances. (Note:
The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the
media, the noise coupling to the environment, and other system characteristics.)
FEATURES
• Receiver and Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
– SN65LVDS105 Receives Low-Voltage TTL (LVTTL) Levels
– SN65LVDS104 Receives Differential Input Levels, ±100 mV
• Typical Data Signaling Rates to 400 Mbps or Clock Frequencies to 400 MHz
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-Ω Load
• Propagation Delay Time
– SN65LVDS105 – 2.2 ns (Typ)
– SN65LVDS104 – 3.1 ns (Typ)
• LVTTL Levels Are 5-V Tolerant
• Electrically Compatible With LVDS, PECL, LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT, SSTL, or HSTL Outputs With External Networks
• Driver Outputs Are High Impedance When Disabled or With VCC<1.5 V
• Bus-Pin ESD Protection Exceeds 16 kV
• SOIC and TSSOP Packaging

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