SN74LVC1G17DBVT - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC1G17DBVT
Manufacturer

TI
ChipWorker Part#

CW6295533
Category

Logic Controller, Logic IC
Package

SOT-23-5
Description

Schmitt Trigger Buffer 1CH Non-Inverting CMOS 5Pin SOT-23 T/R
Documentation

Datasheet

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SN74LVC1G17DBVT Specifications

Attribute	Attribute Value

Part Number	SN74LVC1G17DBVT
Manufacturer	TI
ChipWorker Part#	CW6295533
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	5 Pin
Case/Package	SOT-23-5
Supply Voltage (DC)	1.65V ~ 5.50V
Number of Outputs	1 Output
Number of Channels	1 Channel
Number of Positions	5 Position
Number of Bits	1 Bit
Propagation Delay Max (tpd)	5.00 ns
Number of Gates	1 Gate
Output Current Drive	-1.00 mA
Number of Inputs	1 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
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Size-Length	2.9 mm
Size-Width	1.6 mm
Size-Height	1.15 mm
Operating Temperature	-40℃ ~ 125℃ (TA)
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LVC1G17DBVT is a single Schmitt-trigger Buffer designed for 1.65 to 5.5V VCC operation. This device contains one buffer and performs the Boolean function Y = A. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range. The device functions as an independent buffer, but because of Schmitt action, it will have different input threshold levels for a positive-going (VT+) and negative-going signals. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Allows down voltage translation
IOFF Supports live insertion, partial-power-down mode and back drive protection
Latch-up performance exceeds 100mA per JESD 78, class II
Inputs accept voltages to 5.5V
4.6ns at 3.3V Propagation delay (tpd)
10µA ICC Low power consumption
±24mA Output drive at 3.3V
Green product and no Sb/Br

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