SN74LVTH125PWR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVTH125PWR
Manufacturer

TI
ChipWorker Part#

CW2674111
Category

Logic Controller, Logic IC
Package

TSSOP-14
Description

3.3V ABT Quadruple Bus Buffers With 3-State Outputs 14-TSSOP -40℃ to 85℃
Documentation

Datasheet

SN74LVTH125PWR Global Supplier

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SN74LVTH125PWR Specifications

Attribute	Attribute Value

Part Number	SN74LVTH125PWR
Manufacturer	TI
ChipWorker Part#	CW2674111
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	14 Pin
Case/Package	TSSOP-14
Supply Voltage (DC)	2.70V ~ 3.60V
Number of Outputs	4 Output
Output Current	64.0 mA
Number of Channels	4 Channel
Number of Positions	14 Position
Number of Bits	4 Bit
Voltage Nodes	3.30 V, 2.70 V
Quiescent Current	4.5 mA
Number of Gates	4 Gate
Output Current Drive	-500 µA
Number of Inputs	4 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.7V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	2.7 V
	expand all
Size-Length	5 mm
Size-Width	4.4 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃ (TA)
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

description/ordering information
These bus buffers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to
provide a TTL interface to a 5-V system environment.
The ’LVTH125 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is high.
Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
Support Unregulated Battery Operation Down to 2.7 V
Typical VOLP(Output Ground Bounce)
<0.8 V at VCC= 3.3 V, TA= 25°C
Ioff and Power-Up 3-State Support Hot Insertion
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 500 mA Per JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)

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