ADS54J60IRMP - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

ADS54J60IRMP
Manufacturer

TI
ChipWorker Part#

CW7693675
Category

Analog to Digital, ADC IC
Package

VQFN-72
Description

Dual-Channel, 16Bit, 1GSPS Analog-to-Digital Converter (ADC) 72-VQFN -40℃ to 85℃
Documentation

Datasheet

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ADS54J60IRMP Specifications

Attribute	Attribute Value

Part Number	ADS54J60IRMP
Manufacturer	TI
ChipWorker Part#	CW7693675
Category	Analog to Digital, ADC IC
Documentation	Datasheet
Number of Pins	72 Pin
Case/Package	VQFN-72
Power Dissipation	2710 mW
Power Consumption	2.7 W
Number of ADCs	2 ADC
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	3100 mW
Number of Input Channels	2 Channel
Input Voltage	1.9 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	3A001.a.5.a.5

Product Description

The ADS54J60 is a low-power, wide-bandwidth, 16-bit, 1.0-GSPS, dual-channel, analog-to-digital converter (ADC). Designed for high signal-to-noise ratio (SNR), the device delivers a noise floor of –159 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 10 Gbps, supporting two or four lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. Each ADC channel optionally can be connected to a wideband digital down-converter (DDC) block. The ADS54J60 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption.
The JESD204B interface reduces the number of interface lines, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the ADC sampling clock to derive the bit clock that is used to serialize the 16-bit data from each channel.

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