AM4376BZDND30 - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

AM4376BZDND30
Manufacturer

TI
ChipWorker Part#

CW36228296
Category

Microprocessor IC
Package

LFBGA-491
Description

MPU Sitara RISC 32Bit 800MHz 1.8V/3.3V 491Pin NFBGA
Documentation

Datasheet

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AM4376BZDND30 Specifications

Attribute	Attribute Value

Part Number	AM4376BZDND30
Manufacturer	TI
ChipWorker Part#	CW36228296
Category	Microprocessor IC
Documentation	Datasheet
Number of Pins	491 Pin
Case/Package	LFBGA-491
Frequency	300 MHz
RAM Memory Size	64 KB
Number of UARTs	6 UART
Operating Temperature (Max)	90 ℃
Operating Temperature (Min)	-40 ℃
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Operating Temperature	-40℃ ~ 90℃ (TJ)
Product Lifecycle Status	Active
Packaging	Tray
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	5A992.c

Product Description

* Highlights * Sitara™ ARM® Cortex®-A9 32-Bit RISC Processor With Processing Speed up to 1000 MHz * NEON™ SIMD Coprocessor and Vector Floating Point (VFPv3) Coprocessor * 32KB of Both L1 Instruction and Data Cache * 256KB of L2 Cache or L3 RAM * 32-Bit LPDDR2, DDR3, and DDR3L Support * General-Purpose Memory Support (NAND, NOR, SRAM) Supporting up to 16-Bit ECC * SGX530 Graphics Engine * Display Subsystem * Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU- ICSS) * Real-Time Clock (RTC) * Up to Two USB 2.0 High-Speed Dual-Role (Host or Device) Ports With Integrated PHY * 10, 100, and 1000 Ethernet Switch Supporting up to Two Ports * Serial Interfaces: * Two Controller Area Network (CAN) Ports * Six UARTs, Two McASPs, Five McSPIs, Three I2C Ports, One QSPI, and One HDQ or 1-Wire * Security * Crypto Hardware Accelerators (AES, SHA, RNG, DES, and 3DES) * Secure Boot * Two 12-Bit Successive Approximation Register (SAR) ADCs * Up to Three 32-Bit Enhanced Capture Modules (eCAPs) * Up to Three Enhanced Quadrature Encoder Pulse Modules (eQEPs) o Up to Six Enhanced High-Resolution PWM Modules (eHRPWMs) * MPU Subsystem * ARM Cortex-A9 32-Bit RISC Microprocessor With Processing Speed up to 1000 MHz * 32KB of Both L1 Instruction and Data Cache * 256KB of L2 Cache (Option to Configure as L3 RAM) * 256KB of On-Chip Boot ROM * 64KB of On-Chip RAM * Secure Control Module (SCM) * Emulation and Debug * JTAG * Embedded Trace Buffer * Interrupt Controller * On-Chip Memory (Shared L3 RAM) * 256KB of General-Purpose On-Chip Memory Controller (OCMC) RAM * Accessible to All Masters * Supports Retention for Fast Wakeup * Up to 512KB of Total Internal RAM (256KB of ARM Memory Configured as L3 RAM + 256KB of OCMC RAM) * External Memory Interfaces (EMIFs) * DDR Controllers: * LPDDR2: 266-MHz Clock (LPDDR2-533 Data Rate) * DDR3 and DDR3L: 400-MHz Clock (DDR- 800 Data Rate) * 32-Bit Data Bus * 2GB of Total Addressable Space * Supports One x32, Two x16, or Four x8 Memory Device Configurations * General-Purpose Memory Controller (GPMC) * Flexible 8- and 16-Bit Asynchronous Memory Interface With up to Seven Chip Selects (NAND, NOR, Muxed-NOR, and SRAM) * Uses BCH Code to Support 4-, 8-, or 16-Bit ECC * Uses Hamming Code to Support 1-Bit ECC * Error Locator Module (ELM) * Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH Algorithm * Supports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH Algorithms * Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS) * Supports Protocols such as EtherCAT®, PROFIBUS®, PROFINET®, and EtherNet/IP™, EnDat 2.2, and More * Two Programmable Real-Time Units (PRUs) Subsystems With Two PRU Cores Each * Each Core is a 32-Bit Load and Store RISC Processor Capable of Running at 200 MHz * 12KB (PRU-ICSS1), 4KB (PRU-ICSS0) of Instruction RAM With Single-Error Detection (Parity) * 8KB (PRU-ICSS1), 4KB (PRU-ICSS0) of Data RAM With Single-Error Detection (Parity) * Single-Cycle 32-Bit Multiplier With 64-Bit Accumulator * Enhanced GPIO Module Provides Shift-In and Shift-Out Support and Parallel Latch on External Signal

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