CD4098BE - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD4098BE
Manufacturer

TI
ChipWorker Part#

CW627843
Category

Flip Flop IC
Package

PDIP-16
Description

Monostable Multivibrator, CD4098, 100ns, 6.8mA, 3V to 18V, DIP-16
Documentation

Datasheet

CD4098BE Global Supplier

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CD4098BE Specifications

Attribute	Attribute Value

Part Number	CD4098BE
Manufacturer	TI
ChipWorker Part#	CW627843
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	PDIP-16
Digital Logic Level	CMOS
Supply Voltage (DC)	15.0 V, 18.0 V (max)
Operating Voltage	3V ~ 18V
Output Current	6.8 mA
Number of Circuits	2 Circuit
Number of Channels	2 Channel
Number of Positions	16 Position
Number of Bits	2 Bit
Voltage Nodes	5.00 V, 10.0 V, 15.0 V
Power Dissipation	500 mW
Number of Gates	2 Gate
Input Capacitance	5.00 pF
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 18V
Supply Voltage (Max)	18 V
Supply Voltage (Min)	3 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
ECCN Code	EAR99

Product Description

The CD4098BE is a CMOS dual monostable Multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application. An external resistor (RX) and an external capacitor (CX) control the timing for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from set input to output transition (reset propagation delay) are independent of RX and CX. Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) input are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused (-TR) input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on.
Retriggerable/resettable capability
Trigger and reset propagation delays independent of RX, CX
Triggering from leading or trailing edge
Q and Q\ buffered outputs available
Separate resets
Wide range of output-pulse widths
100% Tested for maximum quiescent current at 20V
Maximum input current of 1µA at 18V
Standardized, symmetrical output characteristics
Green product

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