MC14094BDR2G - ON Semiconductor

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

MC14094BDR2G
Manufacturer

ON Semiconductor
ChipWorker Part#

CW435509
Category

Shift Register IC
Package

SOIC-16
Description

ON SEMICONDUCTOR MC14094BDR2G Shift Register, MC14094, Serial to Parallel, 1Element, 8Bit, SOIC, 16Pins
Documentation

Datasheet

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MC14094BDR2G Specifications

Attribute	Attribute Value

Part Number	MC14094BDR2G
Manufacturer	ON Semiconductor
ChipWorker Part#	CW435509
Category	Shift Register IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC-16
Supply Voltage (DC)	3.00V (min)
Capacitance	7.5 pF
Halogen Free Status	Halogen Free
Number of Outputs	10 Output
Number of Circuits	2 Circuit
Number of Positions	16 Position
Number of Bits	8 Bit
Power Dissipation	500 mW
Quiescent Current	20 µA
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 18V
Supply Voltage (Max)	18 V
Supply Voltage (Min)	3 V
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Size-Length	10 mm
Size-Width	4 mm
Size-Height	1.5 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

The MC14094B combines an 8−stage shift register with a data latch for each stage and a 3−state output from each latch. Data is shifted on the positive clock transition and is shifted from the seventh stage to two serial outputs. The QSoutput data is for use in high−speed cascaded systems. The QSoutput data is shifted on the following negative clock transition for use in low−speed cascaded systems. Data from each stage of the shift register is latched on the negative transition of the strobe input. Data propagates through the latch while strobe is high. Outputs of the eight data latches are controlled by 3−state buffers which are placed in the high−impedance state by a logic Low on Output Enable.
Features
•3−State Outputs
•Capable of Driving Two Low−Power TTL Loads or One Low−Power Schottky TTL Load Over the Rated Temperature Range
•Input Diode Protection
•Data Latch
•Dual Outputs for Data Out on Both Positive and Negative Clock Transitions
•Useful for Serial−to−Parallel Data Conversion
•Pin−for−Pin Compatible with CD4094B
•These Devices are Pb−Free and are RoHS Compliant
•NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable

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