MC74HC74ADG - ON Semiconductor

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

MC74HC74ADG
Manufacturer

ON Semiconductor
ChipWorker Part#

CW2033200
Category

Flip Flop IC
Package

SOIC-14
Description

ON SEMICONDUCTOR MC74HC74ADG Flip-Flop, with Set and Reset, Complementary, Positive Edge, 74HC74, D, 20ns, 35MHz, 5.2mA, SOIC
Documentation

Datasheet

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MC74HC74ADG Specifications

Attribute	Attribute Value

Part Number	MC74HC74ADG
Manufacturer	ON Semiconductor
ChipWorker Part#	CW2033200
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	14 Pin
Case/Package	SOIC-14
Frequency	35 MHz
Supply Voltage (DC)	2.00V (min)
Current Rating	4.00 µA
Halogen Free Status	Halogen Free
Number of Outputs	1 Output
Output Current	5.2 mA
Supply Current	80 μA
Number of Circuits	2 Circuit
Number of Channels	2 Channel
Number of Positions	14 Position
Clock Speed	35 MHz
Number of Bits	2 Bit
Polarity	Non-Inverting, Inverting
Number of Gates	2 Gate
Input Capacitance	10 pF
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Size-Length	8.75 mm
Size-Width	4 mm
Size-Height	1.5 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17
ECCN Code	EAR99

Product Description

The MC74HC74ADG is a dual D-type Flip-flop with set and reset. It is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs, with pull-up resistors, they are compatible with LSTTL outputs. This device consists of two D flip-flops with individual Set, Reset and Clock inputs. Information at a D-input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip-flop. The set and reset inputs are asynchronous.
10 LSTTL Loads output drive capability
Outputs directly interface to CMOS, NMOS and TTL
High noise immunity characteristic of CMOS devices
Complies with JEDEC standard No. 7A

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