NPIC6C596ADJ ,Logic Controller, Logic IC - Nexperia

The pictures are for reference only, and the specific specifications can be found in the product manual.

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73 points

Part No

NPIC6C596ADJ
Manufacturer

Nexperia
ChipWorker Part#

CW32260263
Category

Logic Controller, Logic IC
Package

SOIC-16
Description

IC SHIFT REGISTER 8Bit 16SOIC
Documentation

Datasheet
Ships from

Moscow
Наличие

In Stock
Estimated Price

$ 0.16

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NPIC6C596ADJ Specifications

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Attribute	Attribute Value

Part Number	NPIC6C596ADJ
Manufacturer	Nexperia
ChipWorker Part#	CW32260263
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC-16
Number of Outputs	9 Output
Output Current	100 mA
Number of Channels	8 Channel
Number of Positions	16 Position
Number of Bits	8 Bit
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.3V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	2.3 V
	expand all
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status
ECCN Code	EAR99

Similar & Replacement Parts

Product Description

The NPIC6C596ADJ is a 8-bit serial-in/serial or parallel-out power logic Shift Register with a storage register and open-drain outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR\ input. A low on MR\ resets both the shift register and storage register. Data is shifted on the low-to-high transitions of the SHCP input. The data in the shift register is transferred to the storage register on a low-to-high transition of the STCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register. To provide additional hold time in cascaded applications, the serial output QS7 is clocked out on the falling edge of SHCP. Data in the storage register drives the gate of the output extended-drain NMOS (EDNMOS) transistor whenever the output enable input is low.
Eight power EDNMOS transistor outputs of 100mA continuous current
33V Output clamping voltage
Enhanced cascading for multiple stages
All registers cleared with single input
Low power consumption
250mA Current limit capability
30mJ Avalanche energy capability

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